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Author Topic: Interrupt voltage level  (Read 749 times)

Offline Charlienccs

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Interrupt voltage level
« Reply #30 on: October 12, 2017, 03:52:59 AM »
Here are my solutions for the teaser pack, played in Custom Lemmings viewer style I assume it's the correct one, even though there were no ONML graphic set levels for some reason? in traditional Lemmix. Not a single bad level there, and the biggest smile on my face made "Jump in the Ring" in particular. Nice nice nice

Also, my levelpack file has only 9 levels, not 10, is this intentional?

Offline MichaelPlerm

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Interrupt voltage level
« Reply #31 on: October 12, 2017, 05:07:06 AM »
I found the issue...  please, if possible, check levels in Lemmix.  Even I need to get into the habit of this because the editor part of the Lemmix Level Editor works fine under Linux's WINE.

The problem?  Some objects are not in correct places...

Offline Melonynkxb

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Interrupt voltage level
« Reply #32 on: October 12, 2017, 06:10:21 AM »
In long mode you can specify a number of stacks in the tss. Then in the IDT you specify which stack a particular interrupt will use. See Vol. 3 of the Intel manual for full details.

Offline Thomasbiku

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Interrupt voltage level
« Reply #33 on: October 12, 2017, 09:33:03 AM »
Hey there,

is there any chance to disable the timer interrupt only? I want to idle my cpus, until there is work for them. If I halt them sure with enabled interrupts for wakeup, they will wake up on every timer interrupt.

Thank you

Offline CarrieFiny

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Interrupt voltage level
« Reply #34 on: October 12, 2017, 11:34:31 AM »
Its in VirtualBox.

And how would I do this waiting sanely? It seems that waiting a specific period of time in an interrupt handler with interrupts disabled would be a performance disaster.

Offline Kolbypbug

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Interrupt voltage level
« Reply #35 on: October 12, 2017, 05:41:08 PM »
So, it is safe to return from the interrupt handler and allow the driver thread to handle the interrupt and THEN let it send EOI?

EDIT: Note however, that servicing that interrupt basically involves reading something the  controller put in memory and then updating a tial/head register.

Offline Mandiewnsf

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Interrupt voltage level
« Reply #36 on: October 12, 2017, 06:36:46 PM »
it seems that youre in x86 mode.
If my memory is correct, TSSes in long modex64 contain a Interrupt Stack Table and IntGatesx64 contain a index which points to the table. The IST dont rely on which ring to switch and when interrupts happen, if an index in a IntGatex64 points to an item in the IST, stack switch will always cause.
But in protected mode, you seems to do it manually  .

Offline Zachalel

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Interrupt voltage level
« Reply #37 on: October 13, 2017, 04:19:52 AM »
I send an EOI to the master in the IRQ0,1,3-7 handlers, and one to the slave in IRQ8-15 handlers, after re-enabling interrupts Im using interrupt gates not trap gates, but before IRET.